1. Technical Field
The present invention relates in general to interface circuitry for low voltage digital technologies and in particular to a level shifting output driver. Still more particularly, the present invention relates to an output driver which maintains minimal voltage stress on individual circuit elements.
2. Description of the Related Art
Efforts to decrease the size, increase the speed and reduce the power consumption of electrical circuits has created the need for low voltage silicon construction. Lower voltage requirements result in lower power consumption which complements battery powered, portable electronics.
Lower operating voltage also provides for faster circuits. The voltage applied across a semiconducting device is directly related to its maximum switching frequency. Lower operating voltages provide for faster switching rates. With advances in semiconductor fabrication techniques, the size of electronic devices has been reduced to the sub-micron level and the voltage requirements of those devices has been being reduced significantly. In a typical computer system, a processor is coupled through a system bus to other devices, such as a system memory, an input/output ("I/O") controller, and an application specific integrated circuit ("ASIC"). Relative to these other devices, the processor can be manufactured according to a more advanced semiconductor fabrication techniques utilizing thin semi-conductor junctions.
Microprocessor core fabrication technology is still evolving rapidly. Microprocessor fabrication technology is advancing at a much faster rate than fabrication technology of other devices. Device geometries within the core logic of microprocessors are shrinking and power supply voltages must be lowered to accommodate small device geometries. Current silicon technology, using CMOS transistors, has reduced the required junction threshold voltage to approximately zero volts. The current low voltage logic standards are 1.8 volts and 3.3 volts. Presently available ASIC, interface and support circuits have relatively high voltage requirements due to device geometries.
For example, it is possible for normal operating voltages in a microprocessor to range between zero volts and 1.8 volts, while normal operating voltages in the other devices range between zero volts and 3.3 volts. In such a situation, a logic 1 state is represented by 1.8 volts in the microprocessor and by 3.3 volts in the other devices. In either case, a logic zero state is represented by zero volts.
Presently in order to communicate a logic high state between the processor and other devices, system busses transfer a signal having 3.3 volts. For this reason, the processor includes driver circuitry for translating a 1.8 volt logic high signal from the core logic within the microprocessor into a 3.3 volt signal for communicating a logic high through the system bus. Likewise, the microprocessor includes driver circuitry for translating a 3.3 volt logic high signal from the system bus into a 1.8 volt logic high signal for use elsewhere within the microprocessor.
Microprocessor core logic which operates at 1.8 volts can be damaged when more than 2 volts is applied across any given device. It is therefore a challenge to design circuitry which can guarantee that each individual device within a microprocessor can withstand bus voltages exceeding 2 volts.
Known driver circuitry fails to translate voltages in a manner that avoids damage to its transistors under some circumstances, particularly when the processor's maximum voltage is substantially lower than the other devices' maximum voltage(s). For example, some fabrication techniques impose a relatively low predetermined limit on a maximum safe difference between a voltage at a transistor's gate and a voltage at a source/drain region of the transistor. In such a situation, if a transistor's source/drain region has a voltage that differs from a voltage at the transistor's gate by more than the predetermined limit, then the transistor's gate oxide could be damaged in a manner that destroys the transistor's operability.
Conventional output drivers perform sufficient level shifting but lack sufficient over voltage protection. Prior art devices have poor design margin which results in reliability problems. Particularly when power surges occur or power is turned on. Variations in supply voltage or power surges can over-stress junctions. This eventually leads to device failure. Most existing circuits add undue complexity, cost and unreliability to a system. Also, many external interface circuits slow the overall speed of the system and increase power consumption.
Another problem which may occur is loss of data because an output interface driver does not reach the proper threshold logic voltage at the required time. External compensation methods can also introduce incompatibility.
Presently, internal compensation methods for creating compatibility between logic level standards utilize higher voltage, thicker gate dimensions. Thus, a need has arisen for a method and circuitry for translating voltages, in which damage to a low voltage transistor is avoided, even if a maximum voltage of a first device (e.g. a processor) is substantially lower than a maximum voltage at a second device, and even if a relatively low predetermined limit is imposed on a maximum safe difference between a voltage at the transistor's gate and a voltage at a source/drain region of the transistor.
Hence, retaining functionality and optimum performance while reducing the maximum voltage which can possibly exist across an active element is desirable and advantageous. The present invention is directed at solving the incompatibility problem that exists between low voltage processor core technology and higher voltage I.backslash.O digital interface circuitry.